c - Adding a library to my makefile -


i have set makefile takes sources main.c, word.c, , trim.c used library called linkedlist.a, after adding it not build keep getting undefined references functions within linkedlist.

the following makefile code:

shell = /bin/sh srcdir = . cc = gcc yacc = bison -y cdebug = -g compliance_flags = cflags = $(compliance_flags) $(cdebug) -i. -i$(srcdir) ldflags = -g  library_files = linkedlist.a  linkedlist.a: $(library_files).o     $(rm) -f $(output)     $(ar) cr $(output) $(inputs)     ranlib $(output)  ############################################################################################################ # list sources here. sources = main.c word.c trim.c ############################################################################################################  ############################################################################################################ # list name of output program here. executable = wordcounter ############################################################################################################ # create names of object files (each .c file becomes .o file) objs = $(patsubst %.c, %.o, $(sources))  include $(sources:.c=.d)  : $(objs) $(executable)  $(executable) : $(objs)     $(cc) -o $(executable)  $(objs)  %.o : %.c #defines how translate single c file object file.     echo compiling $<     echo $(cc) $(cflags) -c $<     $(cc) $(cflags) -e $< > $<.preout     $(cc) $(cflags) -s $<     $(cc) $(cflags) -c $<     echo done compiling $<  %.d : %.c #defines how generate dependencies given files.  -m gcc option generates dependencies.     @set -e; rm -f $@; \     $(cc) $(compliance_flags ) -m $< > $@.$$$$; \     sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g' < $@.$$$$ > $@; \      rm -f $@.$$$$  clean :   # delete , artifacts build.  thing kept source code.     rm -f *.o     rm -f *.preout     rm -f *.s     rm -f *.s     rm -f *d     rm -f $(executable)

i feel added proper items in proper places. best guess library_files somehow wrong?

your $(executable) rule doesn't mention library, tries link main.o, word.o , trim.o. must rewrite rule.

first try command line (because can't make until know how without make):

gcc -o wordcounter main.o word.o trim.o -l. -llinkedlist

if works, can write rule:

$(executable) : $(objs) linkedlist.a     $(cc) -o $@ $(objs) -l. -llinkedlist

if doesn't, we'll have tweak little. , further refinements possible, once have makefile working.


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